VLSI Physical Design / APR Engineer

CHS OU Ambarella (Shanghai) Company Ltd

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Taiwan Hsinchu Until 8/22/2026 First posted March 18, 2026 Last posted March 18, 2026
Job description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Job Description:

1. VLSI Advance Technology Node (2nm and Below) Physical Design Implementation.
2. Comprehensive scope to touch, including chip floorplanning, a variety of design closures on timing, signal integrity, power integrity, DFM as well as physical verifications.
3. Develop physical design flows/solutions on the cutting edge technology node.

Job Requirements:

1. Good communication skill, enthusiasm, responsible, opened minded and team work spirit.
2. Studied VLSI design related courses.
3. Familiar with industrial ASIC design flow is a plus.
4. Had the experience on the EDA tool of Innovus or ICC2 is a plus.

About this role

Summary

Develop physical design flows for advanced tech nodes in VLSI, including chip implementation and verification.

Job title

VLSI Physical Design / APR Engineer

Experience level

Industry

technology

Location requirements

must be in taiwan, open to remote work

Salary

Not specified

Management role

No

Skills & keywords

Required skills

VLSI designEDA toolsInnovusICC2

Preferred skills

ASIC design flow

Specializations

physical designchip floorplanningtiming closuresignal integritypower integrity
Locations

Structured locations inferred from the posting.

Taiwan

Remote Country

Hsinchu, North District, Hsinchu City, Taiwan

On-site City