Staff Layout Engineer

Broadcom Corporation

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China-Shanghai-Zhangjiang Hi Tech Until 10/6/2026 8+ years exp H-1B sponsor history First posted August 7, 2026 Last posted August 7, 2026
Job description

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Job Description:

Job Description

Role Overview

Responsible for executing high-quality layouts across Standard Cells, I/O pads, and Mixed-Signal IP in advanced processes within project schedules.

Work location : Singapore

Key Responsibilities

  • Layout Design & Execution: Apply design guidelines and advanced process rules to deliver high-performance, robust layouts.

  • Planning & Floorplanning: Work independently to manage schedules and execute layouts from the transistor level up, including cell- and block-level floorplanning.

  • Collaboration & Innovation: Adapt quickly to emerging layout methodologies, adopt new ideas, and communicate effectively with engineers across all sites. 

Skill Set & Requirements

  • Education & Experience: Bachelor in Electronic Engineering with a minimum of 8 years of IC layout experience.

  • Core Technical Expertise:

    • Strong background in Standard Cell, Memory, Full Custom, and/or Analog/Mixed-Signal layout.

    • Solid understanding of ESD and Latch-up principles for I/O design.

    • Deep understanding of deep sub-micron / advanced nodes (e.g. 5nm, 3nm, 2nm, 1.4nm ).

  • Domain & Tool Knowledge:

    • Proficient with Cadence Virtuoso layout tool and Calibre physical verification (DRC, LVS, ERC, Antenna, and EM/IR analysis.)

  • Scripting knowledge (Shell, Python, Tcl) or Cadence SKILL programming is a plus.

  • Personal Attributes: 

    • Self-motivated, capable of working independently, and a strong collaborative team player.

    • Ability to lead on new technology reviews to compile documentation of layout methodology, layout flow and guidelines.

    • Good leadership quality on project management.

  • Re-location: 

    • Must be available for immediate relocation to Singapore 

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

About this role

Summary

Designs and executes high-quality IC layouts using advanced process design rules.

Job title

Staff Layout Engineer

Experience level

8+ years

Minimum experience

8+ years exp

Industry

semiconductor

Location requirements

Must relocate to Singapore, remote not allowed.

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

IC layoutCadence VirtuosoCalibre DRCLVSERCAntenna analysisEM/IR analysis

Preferred skills

ShellPythonTclCadence SKILL

Specializations

layout designstandard cellmixed-signaladvanced nodes
Locations

Structured locations inferred from the posting.

Singapore

On-site City