Sr. Principal Product Engineer, RTL-GDSII
CADENCE US
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This position presents an exciting opportunity within Cadence’s Digital and Signoff Group (DSG) for a Product Engineer. In this dynamic environment, you’ll collaborate closely with R&D, Application Engineering & product marketing teams to help drive the development of advanced chip design software tools. Your responsibilities will include:
- Provide place-and-route expertise to both Cadence customers and internal development teams
- PPA benchmarking on customer and foundry test cases
- Evaluate impact of new features on PPA
- Be a liaison for new features between customer/foundry and R&D development teams
- Develop point solutions with scripting
- Data mining and analysis to uncover PPA limiting issues and identify optimization opportunities
Minimum Qualifications:
- A Bachelor or Master’s degree in EE/CS or equivalent major (Masters level preferred)
- A minimum of 10 years of hands on experience with any industry standard place-and-route tools (7 years with Master Degree)
- A good understanding of the RTL-GDSII flow
- A good understanding of the PDK and DK collaterals
- Firm understanding of Timing and power analysis
- Good scripting skills
- Must be legally eligible to work in the US
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Summary
Develop chip design software tools, provide place-and-route expertise, optimize PPA, scripting, data analysis.
Job title
Sr. Principal Product Engineer, RTL-GDSII
Experience level
10+ years
Minimum experience
10+ years exp
Industry
software
Location requirements
Austin, US-based; remote work not specified
Salary
Not specified
Management role
No
Required skills
Preferred skills
Specializations
Structured locations inferred from the posting.
Austin, TX, USA