Sr. Principal Product Engineer – Digital & Signoff Group (DSG)

BANGALORE Until 8/21/2026 6+ years exp First posted June 1, 2026 Last posted June 1, 2026
Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Sr. Principal Product Engineer – Digital & Signoff Group (DSG)

Location: Bangalore
Team: Cadence DSG (Digital & Signoff Group)

The Opportunity

Join Cadence’s Digital and Signoff Group (DSG) as a Product Engineer, where you will act as the vital bridge between R&D, Application Engineering, and our global customers. In this high-impact role, you will influence the next generation of chip design software, helping industry leaders solve complex physical design challenges at 7nm and below.

Key Responsibilities

Technical Expert: Serve as the primary place-and-route (P&R) resource for internal development teams and external customers. Product Evolution: Collaborate with R&D to track, diagnose, and resolve software issues, ensuring a robust tool release cycle. Design Benchmarking: Execute competitive benchmarks to demonstrate Cadence’s edge in Power, Performance, and Area (PPA). Flow Innovation: Develop and deploy customized RTL-to-GDSII methodologies and scripts to meet specific customer design goals. Strategic Collaboration: Partner with Product Marketing to align technical capabilities with market needs and customer roadmaps.

Requirements

Education:

Bachelors in Electronics Engineering (EE) + 8 or more years of industry experience,

OR

Masters in Electronics Engineering (EE) + 6 or more year of digital implementation experience.

Core Expertise: Deep understanding of the full ASIC design flow (RTL-to-GDSII) with a focus on physical design and timing analysis. Advanced Node Experience: Proven hands-on experience with timing closure and PPA optimization at 7nm, 5nm, or below. Tool Proficiency: High familiarity with industry-standard EDA tools for synthesis, placement, routing, and signoff. Scripting Skills: Proficiency in Tcl, Python, or Perl (familiarity with AI-driven productivity tools is a major plus).

Communication: Strong verbal and written skills to translate complex technical issues into actionable solutions.

We’re doing work that matters. Help us solve what others can’t.

About this role

Summary

Lead chip design software development focusing on physical design, timing, and optimization at advanced nodes.

Job title

Sr. Principal Product Engineer – Digital & Signoff Group (DSG)

Experience level

8+ years or 6+ years with master's

Minimum experience

6+ years exp

Industry

software

Location requirements

Bangalore, on-site; remote not specified.

Salary

Not specified

Management role

No

Skills & keywords

Required skills

asic design flowtiming closurePPA optimizationEDA toolsTclPythonPerl

Preferred skills

AI-driven productivity tools

Specializations

asic design flowtiming analysispower-performance-areaphysical designRTL-to-GDSII
Locations

Structured locations inferred from the posting.

Bengaluru, Karnataka, India

On-site City