SoC Verification Engineer

San Jose, CA, us on site Until 8/22/2026 H-1B sponsor history First posted March 23, 2025 Last posted March 23, 2025
Job description

Title:                      SoC Verification

Location:              San Jose, CA
Duration:             6-12 Months 

Candidates must have either in USB or PCIe or Ethernet. 
Job Details:
 ·         Candidate must have 7+ years of experience in Verification
.·          Must have experience in Verification methodology like UVM, OVM, VMM (any one workable).
·         Must have very good experience either in USB or PCIe or Ethernet.
·         Must have experience in System Verilog.
  • Understanding of ONFI, NVMe and SERDES a major plus.

 Candidate must have 7+ years of experience in Verification

.

·          Must have experience in Verification methodology like UVM, OVM, VMM (any one workable).
·         Must have very good experience either in USB or PCIe or Ethernet.
·         Must have experience in System Verilog.
  • Understanding of ONFI, NVMe and SERDES a major plus.

Anvesh Reddy

609 269 2719

About this role

Summary

Verify SoC components using UVM, SystemVerilog, with USB, PCIe, or Ethernet expertise

Job title

SoC Verification Engineer

Experience level

7+ years

Industry

technology

Location requirements

On-site in San Jose, CA, no remote work

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

verification methodologyUVMOVMVMMSystem Verilogusbpcieethernet

Preferred skills

onfinvmeserdes

Specializations

verificationusbpcieethernetsystem verilog
Locations

Structured locations inferred from the posting.

San Jose, CA, USA

On-site City