SoC Performance Analysis Engineer

Austin Santa Clara Until 9/22/2026 0+ years exp First posted July 24, 2026 Last posted July 24, 2026
Job description

Does making the next extraordinary technology product excite you? Imagine what you could do here! At Apple, our new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of our team thereʼs no telling what you could accomplish. The SoC Performance Verification is a critical job within Appleʼs Hardware Technology. Joining this group means you will be responsible for crafting and building the technology that fuels Appleʼs devices. Together, you and your team will enable our customers to do all the things they love with their devices.

Description

Work closely with Architecture to understand performance goals of the design.
Correlate RTL performance against model performance.
Perform deep performance analysis in the design and report findings.
Identify performance bottlenecks and coordinate with Design and Architecture teams to improve performance.
Define performance statistics to help performance debug and standard methodologies to improve performance correlation effort.
Have strong interpersonal skills, work independently & lead work you're doing to align with the project goals plus support multi-functional engineering efforts.

Minimum Qualifications

Bachelors degree + 0 years of industry experience

Preferred Qualifications

You are well-rounded in performance correlation and analysis and are an extraordinary teammate with excellent social skills.
You have the desire to solve diverse challenges.
Sophisticated knowledge of CPU & SOC architecture/design
Familiarity with verification environments and Verilog, C/C++.
Experience with SystemVerilog, Verilog and scripting in Perl/Python

About this role

Summary

Analyze SoC performance, identify bottlenecks, collaborate with design teams, improve efficiency.

Job title

SoC Performance Analysis Engineer

Experience level

entry level

Minimum experience

0+ years exp

Industry

technology

Location requirements

On-site in Austin or Santa Clara, USA

Salary

Not specified

Management role

No

Skills & keywords

Required skills

verilogc/c++systemverilogperlandpython

Preferred skills

performance correlationarchitecture designverification environment

Specializations

performance analysissystemverilogverilogc/c++perlandpython
Locations

Structured locations inferred from the posting.

Austin, TX, USA

On-site City

Santa Clara, CA, USA

On-site City