SoC Digital Verification Engineer (m/f/d)

Munich Until 9/21/2026 First posted July 23, 2026 Last posted July 23, 2026
Job description

Imagine yourself at the center of our SOC/chip DV effort. Where we are collaborating with all fields, playing a meaningful role of getting functional products to millions of customers quickly.

Description

As the SoC Verification Engineer, we are responsible for taking part in a SoC verification process of a large scale SoC. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices — strengthening our dedication to leave the world better than we found it.

Minimum Qualifications

You should have a BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience.
Ability to fluently speak & write in English.

Preferred Qualifications

Hands-on experiences in SoC verification.
Knowledge of SoC architecture/design and in-depth knowledge of verification flow.
Strong understanding and proven experience in the sophisticated verification process, including dynamic, coverage-based and formal methods.
Experience using some of the following: Perl, e, Verilog, System Verilog, C, C++, TCL.
Familiarity with verification environments e.g. UVM, System Verilog is an advantage.
Knowledge in formal, hardware acceleration is a plus.

About this role

Summary

Verify large-scale SoC designs using formal, dynamic, and coverage-based methods.

Job title

SoC Digital Verification Engineer

Experience level

null

Industry

technology

Location requirements

Munich, on-site work only

Salary

Not specified

Management role

No

Skills & keywords

Required skills

VerilogSystemVerilogCC++TCL

Preferred skills

UVMformal verificationhardware acceleration

Specializations

verificationSoC architectureformal methodshardware acceleration
Locations

Structured locations inferred from the posting.

Munich, Germany

On-site City