Silicon Validation Engineer

San Francisco Bay Area Until 9/22/2026 10+ years exp First posted July 24, 2026 Last posted July 24, 2026
Job description

Imagine playing a pivotal role in bringing Apple's groundbreaking mobile SoCs to life, impacting millions of users worldwide. As a DDR Silicon Validation Engineer, you will be at the forefront of innovation, performing critical lab characterization and validation of advanced analog and mixed-signal embedded circuits. This is an unparalleled opportunity to join a dynamic, multi-functional team where your expertise will directly contribute to launching products that redefine what's possible and enrich people's lives. If you thrive on solving complex challenges and are eager to shape the future of mobile technology, we invite you to explore this exciting role.

Description

This role involves the comprehensive bench-level validation, bring-up, and characterization of DDR memory interfaces within Apple's cutting-edge SoCs. You will be responsible for developing and executing electrical tests, automating data collection, and providing crucial design feedback through detailed analysis and reporting. Success in this position requires a hands-on approach to debugging complex silicon issues and a strong understanding of signal and power integrity measurements.

Minimum Qualifications

BS and 10 +years of relevant industry experience

Preferred Qualifications

Master's and or Ph.D. degree in Electrical Engineering or a related field.
Proven experience in DDR memory validation, characterization, or bring-up.
Proficiency in scripting languages such as Python, Perl, or MATLAB for test automation and data analysis.
Strong hands-on lab skills with test equipment including oscilloscopes, logic analyzers, and BERTs.
Deep understanding of signal integrity (SI) and power integrity (PI) concepts and measurement techniques.
Demonstrated ability to debug complex silicon issues and drive root cause analysis.
Experience collaborating effectively with cross-functional teams (Design, System HW, SW, ATE).
Familiarity with SoC architecture and various on-chip interfaces (e.g., JTAG, SPI).

About this role

Summary

Validate and characterize DDR memory interfaces in Apple's SoCs, troubleshoot silicon issues.

Job title

Silicon Validation Engineer

Experience level

10+ years

Minimum experience

10+ years exp

Industry

technology

Location requirements

San Francisco Bay Area; remote work not specified

Salary

Not specified

Management role

No

Skills & keywords

Required skills

test automationscriptingsignal integritypower integritylab skills

Preferred skills

PythonPerlMATLABoscilloscopeslogic analyzers

Specializations

silicon validationDDR memorysignal integritypower integrity
Locations

Structured locations inferred from the posting.

Unknown location

Work arrangement unknown