Senior Verification Engineer

CZ61 NXP Semiconductors Czech Republic s.r.o.

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Austin (Oakhill, Office) Until 8/22/2026 5+ years exp H-1B sponsor history First posted June 12, 2026 Last posted June 12, 2026
Job description

Job Title: Senior Verification Engineer

Location: Austin

Role Summary:

This position is within the MME MCU/MPU Digital IP team.

We develop best-in-class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.

· Drive a “zero-defect” mindset across the verification team

· Provide technical leadership and guidance on complex verification challenges

· Mentor and grow a small team of engineers

Job Responsibility:

· Define and execute verification plans

· Develop and implement verification testbenches

· Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs

· Develop directed and constrained-random stimulus

· Analyze RTL, functional coverage, and assertion coverage results

· Define and develop functional coverage models

· Develop and maintain SystemVerilog assertions (SVA)

· Apply formal verification methodologies

· Demonstrate strong debugging skills, including failure reproduction and root-cause analysis

· Exhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plus

Job Qualification:

· BSEE with 5+ years of semiconductor industry experience, or

· MSEE with 3+ years of experience, or

· PhD with 1+ years of experience

Technical Skills

· Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)

· Strong expertise in Verilog, SystemVerilog (VHDL is a plus)

· Experience with OVM/UVM and class-based verification methodologies

· Experience with formal verification methodologies

· Experience leveraging AI/LLM-based approaches to improve engineering efficiency

· Test pattern debugging and validation on simulation and automated test environments

· Scripting in Python, Perl, and UNIX/Linux

· Familiarity with functional and code coverage methodologies

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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About this role

Summary

Develop and execute verification plans for digital IPs, lead verification team, and optimize verification processes.

Job title

Senior Verification Engineer

Experience level

5+ years

Minimum experience

5+ years exp

Industry

software

Location requirements

Austin, remote work not specified

Salary

$100k+

Visa sponsorship

H-1B sponsor history

Management role

Yes

Skills & keywords

Required skills

VerilogSystemVerilogUVMformal verificationPython

Preferred skills

AI/LLM-based approachescoverage methodologies

Specializations

verificationUVMSystemVerilogformal verification
Locations

Structured locations inferred from the posting.

Austin, TX, USA

Work arrangement unknown City