Senior FPGA IP Solution Design Engineer

Altera Corporation

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Penang 15, Penang, Malaysia Until 8/23/2026 First posted April 17, 2026 Last posted April 17, 2026
Job description

Job Details:

Job Description:

  • Altera offers a large selection of intellectual property IP cores optimized for Altera FPGA devices, all of which are developed for highest performance, lowest cost, ease of use and fastest time-to-market.

  • The FPGA IP System & Solution Engineering group is responsible for High Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA emulation prototyping and hardware validation.

  • In the role of Senior IP Design Engineer specializing in FPGA Soft IP RTL development, you will be responsible for designing, developing, and verifying wireless IP cores for FPGA platforms, while working closely with system architects, verification engineers, and software teams to deliver reliable and high-performance wireless solutions.

Qualifications:

  • Bachelor's degree in Electrical, Electronics, Computer Engineering or equivalent.

  • Proficiency in Verilog/System Verilog, RTL design coding.

  • Experience in FPGA, custom IC or ASIC design, demonstrated excellence in any of the product development areas from architecture, design, validation to product.

  • Familiarity with simulation and verification tools (Synopsy VCS, Questa, Modelsim, etc.).

  • Knowledge of high-speed serial interfaces such as Ethernet, CPRI, and eCPRI, along with familiarity with O-RAN architectures, is a strong plus.

  • Understanding of timing closure, clock domain crossing, and FPGA constraints.

  • Familiarity with Perl, TCL, Python and shell scripts is a plus.

  • Strong written and verbal communication skills to work with cross‑functional team.

  • Demonstrates fundamental values such as accountability, integrity and a winning mindset.

  • Strong analytical and problem-solving skills, with a proactive mindset that promotes innovation and teamwork.

Job Type:

Regular

Shift:

Shift 1 (Malaysia)

Primary Location:

Penang 15, Penang, Malaysia

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
About this role

Summary

Design, develop, verify wireless IP cores for FPGA platforms with cross-functional team collaboration

Job title

Senior FPGA IP Solution Design Engineer

Experience level

not specified

Industry

software

Location requirements

Penang, Malaysia; remote not specified

Salary

Not specified

Management role

No

Skills & keywords

Required skills

VerilogSystemVerilogRTL designFPGAsimulation toolsEthernetCPRIeCPRItiming closure

Preferred skills

high-speed serial interfacesO-RANPerlTCLPythonshell scripts

Specializations

FPGA designRTL developmenthigh-speed serial interfaceswireless IP cores
Locations

Structured locations inferred from the posting.

George Town, Penang, Malaysia

Work arrangement unknown City