Senior Digital backend engineer

CZ61 NXP Semiconductors Czech Republic s.r.o.

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Noida Bangalore Until 9/5/2026 5+ years exp H-1B sponsor history First posted July 7, 2026 Last posted July 7, 2026
Job description
Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including floorplanning, routing, timing convergence (STA) including related design ECO and physical verification for fulfilling all Technology & reliability related rules, such as DRC/LVS/Electromigration/IR drops. The individual contributes to problem solving related to physical design. Contributes to define best Physical design strategy per technology node.


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About this role

Summary

Design and optimize physical implementation of IP, subsystems, or ICs from RTL to GDS.

Job title

Senior Digital backend engineer

Experience level

senior level

Minimum experience

5+ years exp

Industry

semiconductors

Location requirements

Noida or Bangalore, remote work not specified

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

RTL synthesisfloorplanningroutingtiming convergencephysical verification

Preferred skills

None specified

Specializations

physical designRTL synthesisfloorplanningroutingtiming convergence
Locations

Structured locations inferred from the posting.

Noida, Uttar Pradesh, India

Work arrangement unknown City

Bengaluru, Karnataka, India

Work arrangement unknown City