Senior DFT Engineer

India, Bangalore, RMZ Until 8/21/2026 H-1B sponsor history First posted April 29, 2026 Last posted April 29, 2026
Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

Job Description

  • DFT specifications, architecture and implementation using state-of-the-art methodologies and tools
  • Methodology support, DFT Flow Automation, and DFT Innovation
  • Support all product lines with High Coverage, Low Power, Low Test Time
  • Deliver high quality, verified, Automatic Test Pattern Generation (ATPG) patterns
  • Pre/Post silicon verification & debug
  • Work independently and mentor junior team members

Minimum Qualifications

  • 6 - 8 years of directly related experience in ASIC/SoC DFT
  • Expert level knowledge of DFT architecture and planning
  • Hands on Tessent DFT Tool experience
  • Expert level knowledge of Scan, Test Compression, At-Speed Test, Memory Built-In Self-Test (MBIST), Logic Bist (LBIST)
  • Hands-on experience of Scan Insertion, Compression Insertion, On-Chip Clock Control Insertion, ATPG, DFT Verification
  • Gate-level simulation with SDF
  • Silicon test bring up support, failure analysis debug/diagnosis
  • Scripting: Perl/Python/Tcl
  • Team-player: the ability to forge and maintain relationships with peer-organizations
  • Strong written and verbal communication skills

Preferred Qualifications

  • Experience with Cadence and Synopsys DFT tools
  • Experience with IEEE 1149 and JTAG
  • Experience with Static Timing Analysis
  • Experience with Built-In Self-Test (BIST)
  • Experience with Synthesis and DFT Insertion
  • Experience with Low Power Scan and UPF

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days
About this role

Summary

Design, implement, and verify DFT architectures for ASIC/SoC with team leadership

Job title

Senior DFT Engineer

Experience level

6-8 years

Industry

semiconductors

Location requirements

Bangalore, India; remote not specified

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

DFT architectureTessent DFT ToolScanTest CompressionAt-Speed TestMBISTLBISTScan InsertionCompression InsertionATP

Preferred skills

CadenceSynopsysIEEE 1149JTAGStatic Timing AnalysisBISTSynthesisUPF

Specializations

ASICSoCDFTATPGverification
Locations

Structured locations inferred from the posting.

Unknown location

Work arrangement unknown