Senior Design-for-Test Engineer, ATPG

Israel, Tel Aviv Israel, Yokneam Until 8/21/2026 5+ years exp First posted April 20, 2026 Last posted June 1, 2026
Job description

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

 

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

 

What you’ll be doing:

  • You will be in charge of state of the art Design for Test/ATPG flows and implementation

  • Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

  • Inventing and maintaining automation flows that provide the short test time to production

 

What we need to see:

  • 5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools

  • Strong programming skills in scripting languages

  • BSc. in Electrical Engineering or Computer engineering

  • Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility

 

Ways to stand out from the crowd:

  • Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation

  • Experience in Mentor TestKompress ATPG tool and retargeting flow

  • Programming languages: TCL, PRL, Phyton & Unix shell scripts

  • Experience with ATE and Silicon bring-up

 

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative and autonomous, we want to hear from you! You will have the opportunity to work on some of the most incredible products on the market today.

About this role

Summary

Develop and implement advanced ATPG flows, own project end-to-end, automate test processes.

Job title

Senior Design-for-Test Engineer, ATPG

Experience level

5+ years

Minimum experience

5+ years exp

Industry

semiconductor

Location requirements

Israel, Tel Aviv or Yokneam; remote work allowed

Salary

Not specified

Management role

No

Skills & keywords

Required skills

DftATPGASIC designscriptingPythonShell scripting

Preferred skills

scanBISTfault modelsMentor TestKompressretargeting flowATEsilicon bring-up

Specializations

DFTATPGhardware
Locations

Structured locations inferred from the posting.

Israel

Remote Country

Tel Aviv-Yafo, Israel

On-site City

Yokne'am Illit, Israel

On-site City