R&D Physical Design Engineer

Broadcom Corporation

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China-Shanghai-Zhangjiang Hi Tech Until 8/22/2026 7+ years exp H-1B sponsor history First posted June 19, 2026 Last posted June 19, 2026
Job description

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Job Description:

Physical Design Implementation: An ideal candidate having strong background in either the Physical Design which includes floor planning, placement, design closure, STA, and DRC & LVS skills. 
Overall, candidates are expected to develop the most of above skills. Candidates who have the desire to seek the in-depth and broad technical challenge should apply. 
It would be better if the candidate have the experience running full chip signoff tasks including PI, SI, PV and STA. 

Requirements/Qualifications
- Candidates should have good understanding about ASIC design flow and solid VLSI background. 
- Candidates should be able to handle block implementation/top level task independently.  
- Tapeout experience in 7nm and blow process design.
- Candidate s should have strong communications and problem solving skills. 
- Candidates with experience in any one of following knowledge are a plus 
   - DFT insertion
   - Power/IVD analysis
   - DRC/LVS
- STA
- Candidate is good at Perl/Tcl

Education/Certifications 
Preferred Degree: 7+ years MS Preferred 
Major: Microelectronics or related discipline
 

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

About this role

Summary

Develop and implement physical design, handle chip signoff tasks, and optimize ASIC design.

Job title

R&D Physical Design Engineer

Experience level

7+ years

Minimum experience

7+ years exp

Industry

semiconductors

Location requirements

Shanghai, China; remote not specified

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

ASIC design flowVLSIfull chip signoffPerlTcl

Preferred skills

DFT insertionpower analysisIVD analysisDRCLVS

Specializations

physical designfloor planningplacementdesign closureSTA
Locations

Structured locations inferred from the posting.

Shanghai, China

On-site City