Principal Engineer Mask Design (Hybrid)

-

Job Description
In your new role you will:

• VLSI component layout and translation of schematics into layout geometry
• Participate in module/chip floor planning, performing layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results.
• Extensive use of CAD tools (Cadence Virtuoso--VXL & Calibre) in chip assembly and verification
• Perform block level/full chip verification check and fixes
• Leading/co-leading a project

Your Profile
You are best equipped for this task if you have:

• Bachelor’s Degree in Electrical/Electronics Engineering, Bachelor’s Degree in Physics with VLSI exposure or equivalent with around 13-20 years of job experience in layout design field is preferred.
• Excellent communication skills and good initiative at work.
• Possess strong analytical skills
• Ability to work with multiple groups as a team member.
• Knowledge in VLSI Layout Design, IO Layout Design and understanding of geometrical design rules will be an added advantage.

#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in?

We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.