Principal Emulation and Validation Engineer

WinMax Systems Corporation

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San Jose, CA, us on site Until 8/21/2026 First posted March 27, 2025 Last posted March 27, 2025
Job description

Your responsibilities include:

o Synthesize complex system on chip designs and map into various hardware emulator platforms like Cadence Palladium or Mentor Veloce.

o Develop system level tests using tcl, itcl, python, C/C++ languages to verify networking switch chips and systems.

o Create reusable design blocks, libraries and verification components for emulation.

o Improve and define new verification / emulation methodologies.

o Debug and resolve Pre / Post Silicon failures.

o Create and maintain emulation environment for worldwide user community.

o Write Complex Device Driver using C/C++ to implement feature on a flexible architecture and support and promote with wide range customer adoption.

Job Requirements:

o Total engineering minimum experience required is typically a BS degree and 12+ years of experience, an MS degree and 9+ years of experience or a PhD and 6 years of experience or equivalent.

o BS (EE/Electrical Engineering or CS/Computer Science) required, MS (EE or CS) preferred or equivalent.

o Hands-on experience with Leadership qualities on driving ASIC / SoC verification flows and methodologies.

o Must have hands-on experience with network protocol validation, RFC, IEEE, etc.

o Good Knowledge in languages relevant to the ASIC verification process including Verilog, System Verilog, Tcl, iTcl, Perl, Python, Ruby, C/C++ and Unix Scripting.

o Strong expertise in writing system level tests and driver using C/C++, Tcl, iTcl, Perl and Python.

o Excellent structured programming skills, data structures, algorithms, SCM for large complex SW projects. Automation experience is a plus.

o Strong Pre/Post Silicon debugging, analytical and independent problem solving ability.

o Good knowledge in using industry standard debugging tools for both HW & SW.

o Must be a team player with good verbal and written communication skills.

o Must be self-driven engineer with good project management and organizational skills to deliver high quality output in a timely manner.

All your information will be kept confidential according to EEO guidelines.

About this role

Summary

Develop and verify system on chip emulation, create tests, debug silicon failures, and develop drivers.

Job title

Principal Emulation and Validation Engineer

Experience level

12+ years

Industry

semiconductors

Location requirements

San Jose, CA, US; on-site preferred

Salary

Not specified

Management role

No

Skills & keywords

Required skills

C/C++PythonVerilogSystem VerilogTcliTclnetwork protocolsdebugging tools

Preferred skills

automationlarge complex software projectsproject management

Specializations

emulationverificationASICSoCnetwork protocols
Locations

Structured locations inferred from the posting.

San Jose, CA, USA

On-site City