Physical Synthesis CAD Engineer

Austin Cupertino Until 9/22/2026 3+ years exp First posted July 24, 2026 Last posted July 24, 2026
Job description

Do you want to directly impact the performance of every iPhone, iPad, and Mac? You'll push the boundaries of physical synthesis for Apple's cutting-edge processors, solving problems that determine whether our next-generation CPUs, GPUs, and NPUs can deliver breakthrough performance while maintaining industry-leading power efficiency.

Description

You'll own the synthesis challenges that matter most to Apple Silicon. You will apply your hands-on skills in developing, improving and supporting the implementation flow from RTL through GDS signoff. You will be directly responsible to improve physical synthesis techniques through innovative scripts, flows and automation.

As the synthesis and flow expert, you'll partner closely with design teams to define what works best for their specific challenges. You'll develop the methodologies, tools, and optimized flows that enable design teams to achieve breakthrough PPA results. You'll push beyond conventional synthesis limits - developing innovative techniques and proving their effectiveness by running full validation flows from RTL through place-and-route and timing signoff to show actual PPA improvements. Your optimizations will directly translate to faster, more efficient Apple devices.

You'll work directly with EDA vendors to shape tool roadmaps, build custom solutions for problems that push beyond industry standards, and see your work ship in millions of devices.

Minimum Qualifications

Experience with TCL, Python or Perl scripting languages
Experience with industry standard Synthesis tools such as Fusion Compiler or Genus
Experience working with CAD Tools & flow
Minimum requirement of BS + 3 years of relevant industry experience

Preferred Qualifications

Experience in CAD flow or FE methodology development
Experience with Low Power implementation flows (UPF) is a plus
Experience with logical equivalence tools such as Conformal LEC and/or Formality is a plus
Experience in linting, static timing analysis, low power checks (UPF) or place and route tools is a plus
Proficiency with TCL, Python or Perl scripting languages strongly preferred

About this role

Summary

Develop and optimize physical synthesis flows and tools for Apple Silicon.

Job title

Physical Synthesis CAD Engineer

Experience level

3+ years

Minimum experience

3+ years exp

Industry

technology

Location requirements

Austin or Cupertino, remote not specified

Salary

Not specified

Management role

No

Skills & keywords

Required skills

TCLPythonPerlFusion CompilerGenus

Preferred skills

CAD flowFE methodologyUPFConformal LECFormalitylintingstatic timing analysislow power checksplace and route

Specializations

physical synthesisEDA toolsflow developmentautomationlow power
Locations

Structured locations inferred from the posting.

Austin, TX, USA

On-site City

Cupertino, CA, USA

On-site City