Physical Design Engineer

system canada technologies

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Irvine, CA, us on site Until 8/21/2026 First posted February 24, 2026 Last posted February 24, 2026
Job description

SCT resources have a broad range of skills in different technologies. The large skill-set has been made possible by a conscious focus on strengthening our skills base. Every person selected for our team brings something new, something that adds to our offerings. We learn continuously, both on the job and through formal training programs.

Job Description:

Physical design implementation at block or top level, low power techniques and timing closure

 

Job Duties Include:

- Will own all parts of the physical design process from netlist handoff to tapeout including floorplanning, place and route, clock tree synthesis, timing closure and physical verification

- Verify effects of crosstalk, IR drop and electromigration

- Very comfortable writing scripts in TCL and Perl to achieve higher performance and productivity through automation

- Work very closely with logic designers, who are members of this same group, to build complex SOC's

 

Job Requirements:

- BSEE with 6+ (or MSEE with 3+) years related experience;

- Physical design knowledge, from netlist handoff to GDS tapeout including floorplanning, place and route, clock tree synthesis, timing closure and physical verification

- Experience with 45nm or 28nm technology

- Experience with low power techniques

- Experience with TCL and Perl

- Excellent communication and presentation skills

- Well organized, methodical and detail oriented

About this role

Summary

Own all physical design process stages from netlist to tapeout, focusing on low power and timing.

Job title

Physical Design Engineer

Experience level

6+ years or 3+ years with master's

Industry

semiconductors

Location requirements

Irvine, CA, US, on-site role

Salary

Not specified

Management role

No

Skills & keywords

Required skills

BSEEphysical designnetlist handofffloorplanningplace and routeclock tree synthesistiming closurephysical verificationTCLPerl

Preferred skills

low power techniques45nm28nmcrosstalkIR dropelectromigration

Specializations

physical designtiming closurelow power techniquesautomation
Locations

Structured locations inferred from the posting.

Irvine, CA, USA

On-site City