Physical Design Engineer
Broadcom Corporation
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Job Description:
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet rigorous criteria for achieving Right-First-Time silicon. Candidates must have extensive experience in block-level and top-level layout activities, including floor-planning, partitioning, placement, clock tree synthesis, routing, and physical verification.
Responsibilities include, but are not limited to:
- Understanding SoC for top-down/bottom-up physical design integration in 5nm and lower technologies.
- Demonstrating deep functional knowledge of P&R flows, with the ability to quickly adapt to internal methodologies.
- Implementing timing and functional ECOs.
- Executing P&R, extraction, physical verification, and working toward STA closure.
- Building new automation flows as needed and adapting existing flows for re-use.
- Maintaining proficiency in Cadence/Synopsys/Mentor EDA tools for P&R, PV, STA, and ECO.
- Developing automation with high expertise in industry-standard programming languages.
- Clearly understanding execution requisites and leading by example.
- Driving tangible improvements in turnaround time (TAT) alongside better quality.
Minimum Qualifications:
- MSEE/MSCS with 10+ years of experience, or BSEE/BSCS with 12+ years of experience.
- Deep understanding of backend digital design flows.
- Proficiency in timing and physical constraints.
- Proficiency in handling EDA tools across floorplan, partition, placement, CTS, and route stages for SoC TOP.
- Proficiency with backend EDA tools such as Genus, Innovus, Quantus, Tempus, DC, Star-RCXT, PT, PrimeRail, Voltus, Redhawk.
- Proficiency in Tcl and Perl.
- Excellent analytical skills.
- Proven ability to collaborate in a multi-functional environment across different sites and time zones.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Summary
Lead physical design activities including floorplanning, placement, routing, and verification for advanced SoC projects.
Job title
Physical Design Engineer
Experience level
12+ years
Minimum experience
12+ years exp
Industry
semiconductors
Location requirements
Pune, India; remote work not specified
Salary
Not specified
Visa sponsorship
H-1B sponsor history
Management role
No
Required skills
Preferred skills
Specializations
Structured locations inferred from the posting.
Pune, Maharashtra, India