Physical Design Engineer

San Francisco Bay Area Until 9/22/2026 3+ years exp First posted July 24, 2026 Last posted July 24, 2026
Job description

At Apple we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. In this role, we will be at the center of a PHY design effort working with architecture, CAD, timing, and logic design teams, with a critical impact on delivering outstanding PHY designs. You will be required to do physical designs of outstanding PHY design.

Description

As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.

Minimum Qualifications

Bachelors of Science in Electrical Engineering and 3+ years experience preferred.

Preferred Qualifications

The ideal candidate will have deep design experience in high PHY and/or SOC designs.
Deep Knowledge about industry standards and practices in Physical Design, including Physically aware
synthesis, Floor-planning, and Place & Route.
Experience in developing and implementing Power-grid and Clock specifications.
Strong understanding of all aspects of Physical construction, Integration and Physical Verification.
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools.
Deep Understanding of scripting languages such as Perl/Tcl, solid understanding of Extraction and STA methodology and tools.
Deep Understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level.

About this role

Summary

Designs high-performance PHY from RTL to GDSII, involving physical implementation and verification.

Job title

Physical Design Engineer

Experience level

3+ years

Minimum experience

3+ years exp

Industry

technology

Location requirements

San Francisco Bay Area, no remote work allowed

Salary

Not specified

Management role

No

Skills & keywords

Required skills

Physical DesignRTLGDSIIVerilogPlace & RoutePhysical VerificationPower-gridClock specificationsPhysical synthesis

Preferred skills

deep design experienceindustry standardsPower and Clock developmentPhysical VerificationScriptingSTA methodology

Specializations

physical designPHYRTLGDSIIPlace & Route
Locations

Structured locations inferred from the posting.

Unknown location

On-site