Packaging Assembly Engineer

Austin Metro Area San Francisco Bay Area Until 9/22/2026 10+ years exp First posted July 24, 2026 Last posted July 24, 2026
Job description

Do you like to work on ground breaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip-chip BGA (FCBGA) assembly process from pathfinding, NPI through high-volume manufacturing by defining assembly baseline processes, deciding package BOM, establishing package design rules that are optimized for performance, reliability, yield and cost for a variety of projects including SoC.

Description

Responsible to lead packaging assembly technology development. Work with cross functional team and lead SoC Package development efforts. Package architecture / Package integration Innovation Work with foundry and OSAT to bring packaging solution from concept to HVM. Drive industry with advanced Package solutions, new material development, and specs. Minimum 5% International travel.

Minimum Qualifications

BS and 10+ years of experience in relevant industry experience or equivalent

Preferred Qualifications

M.S. or PhD in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering or an equivalent field is desired.
5+ years of extensive experience in Semiconductor Packaging field. Working knowledge in materials characterization and analysis
Working knowledge of large FCBGA package, MCM package, 2.5D packaging and 3D packaging technology. General understanding of packaging technologies, assembly processes, IC packaging materials, reliability standards, FA techniques, etc.
Good communication skills that can enable you to work well with internal multi-functional teams and overseas suppliers.
Ability to work independently and take on projects with minimum supervision.
Good engineering problem solving skills with strong engineering physics and fundamentals.
Can use package design softwares, APD, Virtuoso, etc. Working knowledge in memory packaging.
Good program management skill

About this role

Summary

Lead and develop semiconductor packaging assembly processes, collaborate with teams, optimize designs for reliability and cost.

Job title

Packaging Assembly Engineer

Experience level

10+ years

Minimum experience

10+ years exp

Industry

semiconductor

Location requirements

Austin Metro Area or San Francisco Bay Area, remote optional

Salary

Not specified

Management role

No

Skills & keywords

Required skills

materials characterizationlarge FCBGAMCM package2.5D packaging3D packagingpackage design softwareAPDVirtuoso

Preferred skills

materials sciencemechanical engineeringchemical engineeringelectrical engineeringmemory packaging

Specializations

packagingassemblyIC packagingFGBGA3D packaging
Locations

Structured locations inferred from the posting.

Unknown location

Remote

Unknown location

Remote