Package & SI/PI - Signal and Power Integrity Engineer
Eliyan
Apply to this job Bay Area on site Until 8/23/2026 H-1B sponsor history First posted April 21, 2026 Last posted April 21, 2026
Job description
Join the leading chiplet startup from the ground floor! As a Signal and Power Integrity Engineer, you will provide packaging solutions for chiplet interconnects in a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet-based systems with best-in-class power, area, manufacturability, and design flexibility. You will be responsible for design, modeling, manufacturing, assembly, and testing of traditional and advanced packaging for Eliyan’s chiplet solutions. You will work with a cross-functional team of industry experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits.
Key Responsibilities
- Working closely with analog circuit designers to understand and define IO requirements co-designed with the channel
- Responsible for pre-layout and post layout channel simulation and optimization to achieve the best performance
- Using driver/receiver models to run transient channel simulation, inspect eye diagrams, and improve the performance
- Applying best practices for the design of power delivery networks, extracting models, and performing DC/AC/transient simulations
- Understanding substrate and interposer manufacturing design rules, assembly requirements, and driving the layout engineers to implement them
- Performing measurements in the lab, correlating with simulation, identifying issues and providing solutions
Qualifications
- Expertise in signal integrity and power integrity simulation methodologies
- Experience with simulation tools such as HFSS, Q3D, Siwave, PowerDC, PowerSI, ADS, Spectre, HSPICE, Allegro
- Knowledge of using lab equipment such as Vector Network Analyzer, Spectrum Analyzer, High-Frequency Oscilloscope
- BS degree in EE or equivalent, with 5 years of experience
- Will not relocate for this role a this time and onsite required
Ideal Qualifications
- Previous experience of IC packaging, manufacturing, and advanced package design
- Knowledge of SERDES design, IBIS-AMI model creation
- MS degree in EE or equivalent, with 7 years of experience
About this role
Summary
Design, simulate, and test packaging for chiplet interconnects, ensuring signal integrity and power delivery.
Job title
Package & SI/PI - Signal and Power Integrity Engineer
Experience level
5+ years
Industry
semiconductors
Location requirements
onsite in Bay Area, no remote work allowed
Salary
Not specified
Visa sponsorship
H-1B sponsor history
Management role
No
Skills & keywords
Required skills
signal integritypower integrityHFSSQ3DSiwavePowerDCPowerSIADSSpectreHSPICEAllegroVector Network AnalyzerSpectrum AnalyzerHigh-Frequency Oscilloscope
Preferred skills
IC packagingmanufacturingadvanced package designSERDESIBIS-AMI
Specializations
signal integritypower integrityIC packaginghigh-frequency testing
Locations
Structured locations inferred from the posting.
Unknown location
On-site