Mixed-Signal Verification Engineer
Apple
Apply to this jobCome join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level. All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering.
Description
In this highly visible role, you will be at the center of a wireless Mixed-Signal silicon design group, with a critical impact on getting innovative and functional products to hundreds of millions of customers quickly.
As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the analog/RF design team, digital DV team digital design team, and wireless system team to develop best-in-class verification methodologies that ensure silicon-correct functionality with optimal coverage and time-to-tapeout trade-off.
Minimum Qualifications
Minimum requirement of a bachelors degree
2+ years of hands-on experience in Mixed-Signal verification
Industry verification experience with RF/Mixed-Signal blocks and SOCs
Expertise building Mixed-Signal testbenches, checkers and tests using System Verilog
Experience in UVM methodology and HDL (System Verilog, Verilog) for verification
Strong verification skills in problem solving, testing, and debugging
Understanding of common analog/RF blocks
Experience with UPF, Python or Matlab a huge plus
Experience with Virtuoso Composer, ADE, and HED also a plus
Preferred Qualifications
Bachelor degree in technical disciplines with 2+ years of relevant industry experience.
Expertise creating and using real-numbered analog behavioral models in System Verilog a plus.
Wireless experience a plus
Ability to work well in a team and be productive under aggressive schedule
Excellent communication skills, self-motivation/organization and the desire to take diverse challenges.
Summary
Verify RF and mixed-signal blocks within wireless SOC using SystemVerilog and UVM.
Job title
Mixed-Signal Verification Engineer
Experience level
2+ years
Minimum experience
2+ years exp
Industry
technology
Location requirements
San Francisco Bay Area or San Diego, remote not specified.
Salary
Not specified
Management role
No
Required skills
Preferred skills
Specializations
Structured locations inferred from the posting.
San Francisco, CA, USA
San Diego, CA, USA