Internship - Unified Verification Methodology for Analog Mix Signal Verification
Infineon
Apply to this jobJob Description
In your new role you will:
- Examine how Analog and digital verification platform works.
- With a novel cross-domain verification platform, create a model checker methodology.
- Simulate and improve the computation time with investigation simulation methods.
- Showcase the full verification and findings.
Learning outcomes:
- Understand Digital Design and simulation.
- Understand Analog simulation environment.
- Learn on setup of model-based analog simulation workflow.
- Learn from Analog/Digital Front End designer design on model and analog schematics.
- Proficient in digital tools such excelium , virtuoso.
Your Profile
You are best equipped for this task if you have:
- On track to obtain Bachelor in Electrical and Electronics Engineering and any other relevant field of study.
- Background in digital/analog design
- Background in system-verilog or verilog.
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Summary
Assist in creating a mixed-signal verification methodology and improve simulation processes.
Job title
Internship - Unified Verification Methodology for Analog Mix Signal Verification
Experience level
entry level
Industry
semiconductors
Location requirements
Located in Singapore; remote work not allowed.
Salary
Not specified
Visa sponsorship
H-1B sponsor history
Management role
No
Required skills
Preferred skills
Specializations
Structured locations inferred from the posting.
Singapore