Graphics Post silicon Test & Methodology Engineer

Austin Until 9/22/2026 3+ years exp First posted July 24, 2026 Last posted July 24, 2026
Job description

Do you love creating solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, large subsystems. You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll craft and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. In this role, you will be a cross functional liaison responsible for Pre-silicon inputs and debug on post-silicon to enable implementation, validation, and improvement of power efficiency in our GPU designs.

Description

Are you a competent problem solver who thrives under pressure to find creative time critical solutions to chart the future of GPU designs at Apple? If so, we would love to hear from you.
You will isolate post-silicon issues into Test, Process, Design or interactions, drive stop gaps using PFA/EFA, and make corrective actions in future designs.
Ensure manufacturing deliverables for Power/LVcc Design targets and work on power optimization by collaborating with Product and Silicon Validation teams
You will compare and close Post-silicon to Design targets
You will drive GPU inputs into Product, Test and Silicon Validation teams

Minimum Qualifications

Experience in DFT - ATPG and BIST
Device physics experience
Perl or Python coding experience
BS + 3 years of relevant experience

Preferred Qualifications

Good understanding of STA concepts – explain a PT report
Good understanding of PVT (Process Voltage and Temperature) corners, and Guard bands
Expertise in data analyses using Statistical analyses tools (JMP) with a good understanding of statistics
Familiarity with failure analyses techniques like emissions, DLS, LVI/LVP is desired
Familiarity with IR/IVD analyses to help drive correlation between silicon and design is desired
ATE experience is a plus

About this role

Summary

Responsibilities include post-silicon debugging, power optimization, and collaboration in GPU design

Job title

Graphics Post silicon Test & Methodology Engineer

Experience level

3+ years

Minimum experience

3+ years exp

Industry

technology

Location requirements

On-site in Austin with some collaboration needs

Salary

Not specified

Management role

No

Skills & keywords

Required skills

DFTATPGBISTdevice physicsPythonPerl

Preferred skills

STAPVTstatisticsfailure analysisIR/IVDATE

Specializations

silicon testingpower efficiencypost-silicon debuggingGPU designpower optimization
Locations

Structured locations inferred from the posting.

Austin, TX, USA

On-site City