Graphics (GPU) Architectural Modeling Engineer

Do you love crafting elegant solutions to highly sophisticated challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. We are looking for engineers who are passionate about Architectural Models. You will be responsible for the pre-silicon functional and performance modeling of our industry leading low power GPUs. This includes developing detailed models of the architectural and micro-architectural aspects of various blocks and IPs in the GPU and how they operate within the broader GPU design.

Description

As a Graphics (GPU) Architectural Modeling Engineer, you will:
- Develop architectural models for the development, validation, and verification of graphics processing unit (GPU) design.
- Write bit-accurate architectural models for hardware/software (HW/SW) co-validation.
- Write timing-accurate architectural and micro-architectural models for performance validation and correlation.
- Support GPU hardware and software teams during model and design bring-up.
- Triage regression failures and debug failures to root cause.
- Improve modeling infrastructure.

Minimum Qualifications

Minimum of BS + 3 years of relevant experience.
Experience in C++ programming.
Experience with C++ modeling of Computer Architectures.
Experience with scripting languages Python, Ruby, or Perl.

Preferred Qualifications

Experience with Advanced Computer Architecture.
Experience with GP-GPU or Parallel Architectures.
Experience with Computer Memory Hierarchy.
Experience with bring-up and debug of complex systems.
Experience with GPU Graphics Pipeline.
Experience with performance analysis and debug.
Experience with HDLs, Verilog, System Verilog or VHDL.
Experience with turning architectural specifications into executable models.