FPGA design FADEC SPU
Scalian
Apply to this job San Diego, CA, us on site Until 8/22/2026 First posted April 11, 2026 Last posted April 11, 2026
Job description
All your information will be kept confidential according to EEO guidelines.
Compensation (from employer):
80000 – 140000 USD (MONTHLY)
About this role
Summary
Design FPGA for FADEC SPU systems, focus on aerospace engine control modules.
Job title
FPGA design FADEC SPU
Experience level
Industry
aerospace
Location requirements
On-site in San Diego, CA, no remote work allowed
Salary
80000 – 140000 USD (MONTHLY)
Management role
No
Skills & keywords
Required skills
None specified
Preferred skills
None specified
Specializations
FPGAaerospace
Locations
Structured locations inferred from the posting.
San Diego, CA, USA
On-site City