Formal Verification Engineer
Mirafra Technology
Apply to this jobAbout Mirafra :
Mirafra is software service base organization started in 2004.
We are 500+ employees in India and 250+ In US
Clear visibility to senior management which helps for constant professional growth
Experience with the following: - ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Design and assertion languages: VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal Verification is a must
Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming languages: C, C++, and SystemC - Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion
All your information will be kept confidential according to EEO guidelines.
Summary
Verify hardware designs using formal methods, scripting, and verification tools.
Job title
Formal Verification Engineer
Experience level
Industry
software
Location requirements
San Diego, CA, US, on-site preferred
Salary
Not specified
Visa sponsorship
H-1B sponsor history
Management role
No
Required skills
Preferred skills
Specializations
Structured locations inferred from the posting.
San Diego, CA, USA