Engineering Planner (Project Engineer)

SPACE Until 9/22/2026 First posted June 4, 2026 Last posted July 24, 2026
Job description
Experience or coursework in the design of FPGA and/or ASIC devices.

HDL programming experience with VHDL, Verilog, and/or SystemVerilog.

Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.
About this role

Summary

Design FPGA/ASIC devices, HDL programming, clearance required, US citizenship.

Job title

Engineering Planner (Project Engineer)

Experience level

null

Industry

aerospace

Location requirements

On-site in space industry, no remote work allowed.

Salary

Not specified

Management role

No

Skills & keywords

Required skills

FPGAASICHDLVHDLVerilogSystemVerilog

Preferred skills

None specified

Specializations

FPGAASICHDLVHDLVerilogSystemVerilog
Locations

Structured locations inferred from the posting.

Unknown location

On-site