Early Career Analog Mixed-Signal Design Verification Engineer (m/f/d)

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? As a member of our PMU team at our Nabern office close to Stuttgart, you will have the great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every day! We are looking for an AMS Verification Engineer who will enable us to verify our next generation of PMUs, in close collaboration with the design teams. The responsibilities include contributing to the top level verification of our PMUs. A number of IP specific features as well as interaction between IPs will also be part of the expected verification scope.

Description

- In this role, you will take care of ensuring high quality silicon for IC chips and IPs. The workflow starts with careful review of specifications followed by crafting of a verification plan and schedule. Then the verification is executed according to plan to support tape-out.
- Execution of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out
- Develop detailed test and coverage plans based on IC specifications
- Develop verification methodology suitable for the IP, ensuring scalability and portability
- Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage
- Sign-off mixed signal designs in preparation for tape-out.

Minimum Qualifications

Bachelors in EE or related field, or equivalent work experience
Excellent communication and interpersonal skills, combined with the ability to collaborate
Ability to work well on a team, take ownership and motivate self and others
Fluent English skills

Preferred Qualifications

Basic knowledge of mixed signal verification
University projects or industry experience for production integrated circuits.
Familiarity with hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
Familiar with analog behavioural models
Familiar with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, experience developing scalable and portable test cases
Possess sufficient analog IC background to identify failure possibilities, work through first order debug, and analyse analog verification results