Digital Design RTL Engineer

Broadcom Corporation

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US-Colorado-Fort Collins-4380 Ziegler Road US-CA San Jose Innovation Drive Until 9/22/2026 8+ years exp H-1B sponsor history First posted July 24, 2026 Last posted July 24, 2026
Job description

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Job Description:

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical execution, you will collaborate cross-functionally with the Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule. 

Responsibilities include:

  • Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off

  • Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule

  • High proficiency in SystemVerilog

  • Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques.

Experience:

  • BSEE required, MSEE/PHD preferred

  • 8+ years of industry experience with a focus on SoC integration, high-speed SerDes, LPDDR/DDR, and/or HBM protocols is highly preferred.


Compensation and Benefits


The annual base salary range for this position is To

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

About this role

Summary

Develop high-quality SystemVerilog RTL for advanced process nodes, collaborate across teams, optimize PPA, and ensure timing closure.

Job title

Digital Design RTL Engineer

Experience level

8+ years

Minimum experience

8+ years exp

Industry

technology

Location requirements

On-site in Colorado or California; remote not specified

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

systemverilogRTL designPPA optimizationCDC analysislow power design

Preferred skills

SoC integrationhigh-speed SerDesLPDDR/DDRHBM protocols

Specializations

RTL designsystemverilogPPA optimizationCDC analysislow power design
Locations

Structured locations inferred from the posting.

Fort Collins, CO, USA

On-site City

San Jose, CA, USA

On-site City