CPU Design Architect / Principal Digital Design Engineer

Sunnyvale, CA Until 8/22/2026 H-1B sponsor history First posted March 21, 2025 Last posted March 21, 2025
Job description

Job Description:
Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: 
- Perform CPU development and design integration for MIPS CPU subsystem.  
- Explore latest technologies and be responsible for conducting fundamental research on new directions in CPU architecture  
- Contribute ideas for advanced CPU performance features - analyze workloads in details, identify performance bottlenecks and opportunities, bring a data driven approach to tradeoffs in CPU design, derive architecture and micro-architecture to design/model implantation team, and bring ideas to successful silicon

Minimum Qualifications: 
- Master Degree in Electrical Engineering, Computer Science or Computer Engineering. 
- At least 5 years of CPU related Architect/RTL/Verification/Implementation design experience  
- Knowledge and practical experience with common RISC CPU architecture. 
- Familiarity with chip digital design flow, including RTL integration, simulation, STA. 
- Understanding of high performance techniques and trade-offs in a CPU microarchitecture  
- Ability to problem solve and prove own ideas 

Preferred Qualifications: 
- PhD in Electrical Engineering, Computer Science or Computer Engineering is a PLUS 
- 8+ years of CPU related Architect/RTL/Verification/Implementation design experience  
- Strong CPU architecture knowledge and micro-architecture knowledge  
- Familiarity with Symmetric Multi-processing (SMP) and Snoop-based multi-processor architecture. 
- Familiarity with synthesis, power analysis and post silicon debugging 
- Cross-site working experience is a PLUS. 
- Common knowledge in modeling/DV/OS is a PLUS. 
- Experience with Foundry, Post-Silicon, FPGA, DVT, SLT debug is a PLUS.

#LI-DNI

About this role

Summary

Design high performance, low power CPU for cellular modem applications.

Job title

CPU Design Architect / Principal Digital Design Engineer

Experience level

5+ years

Industry

semiconductors

Location requirements

Located in Sunnyvale, CA; remote work not allowed

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

master degreecpurtlverificationimplementationriscdigital designhigh performance

Preferred skills

phd8+ yearscpu architecturesmpsynthesispower analysispost siliconmodelingfoundryfpga

Specializations

cpuarchitecturedesignverificationimplementation
Locations

Structured locations inferred from the posting.

Sunnyvale, CA, USA

On-site City