Chip Design Verification Engineer

Israel, Tel Aviv Until 8/22/2026 First posted April 20, 2026 Last posted April 20, 2026
Job description

We are now looking for a best-in-class Chip Design Verification Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at NVIDIA's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays’ semiconductor industry – NVIDIA’s GPU Super-Chip. 

What you’ll be doing:

  • Work in a DV (Design Verification) team that has a global responsibility over  deliverable units and clusters to the silicon GPU

  • Integrations and Full-Chip models

  • Verification of chip blocks/entities according to specifications under challenging constraints

  • Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration 

What we need to see:

  • 3+ years of experience in RTL design verification.

  • B.Sc. in Electrical Engineering or Computer Engineering.

  • A team player with good communication and interpersonal skills. 

Ways to stand out from the crowd:

  • Background in Specman and System-Verilog UVM

  • Knowledge in Networking 

NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our team and help us build the future HPC and data centers. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.

About this role

Summary

Verify chip blocks for NVIDIA's GPU Super-Chip using design verification techniques.

Job title

Chip Design Verification Engineer

Experience level

3+ years

Industry

semiconductors

Location requirements

Tel Aviv, Israel; remote work not specified

Salary

Not specified

Management role

No

Skills & keywords

Required skills

RTL design verificationB.Sc. in electrical or computer engineeringcommunication

Preferred skills

specmansystem-verilog uvmnetworking

Specializations

RTL design verificationfull-chip verificationspecmansystem-verilog uvm
Locations

Structured locations inferred from the posting.

Tel Aviv-Yafo, Israel

Work arrangement unknown City