ASIC/FPGA Verification Engineer III, Secret Clearance

SPACE Until 9/3/2026 First posted June 5, 2026 Last posted July 5, 2026
Job description
• Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.

• Experience in the verification of FPGA and/or ASIC devices.

• Experience with modern verification methodologies such as UVM, OVM or VMM.

• HDL programming experience with VHDL, Verilog, and/or SystemVerilog.

• Active DoD Secret clearance, thus US Citizenship is required.
About this role

Summary

Verify FPGA/ASIC devices using modern methodologies and HDL programming.

Job title

ASIC/FPGA Verification Engineer III, Secret Clearance

Experience level

null

Industry

aerospace

Location requirements

On-site in space; US citizenship required

Salary

Not specified

Management role

No

Skills & keywords

Required skills

verificationUVMVHDLVerilogSystemVerilog

Preferred skills

None specified

Specializations

ASICFPGAverificationHDLUVM
Locations

Structured locations inferred from the posting.

Unknown location

On-site