ASIC/FPGA Design Engineer III, Secret Clearance

SPACE Until 9/3/2026 First posted June 5, 2026 Last posted July 5, 2026
Job description
• Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.

• Prior FPGA development experience.

• HDL programming experience with VHDL, Verilog, and/or SystemVerilog.

• Active DoD Secret clearance, thus US Citizenship is required.
About this role

Summary

Designs FPGA hardware using HDL with security clearance and US citizenship required

Job title

ASIC/FPGA Design Engineer III, Secret Clearance

Experience level

null

Industry

aerospace

Location requirements

SPACE, US citizenship, secret clearance required

Salary

Not specified

Management role

No

Skills & keywords

Required skills

FPGA developmentVHDLVerilogSystemVerilog

Preferred skills

None specified

Specializations

FPGAHDLVHDLVerilogSystemVerilog
Locations

Structured locations inferred from the posting.

Unknown location

Work arrangement unknown