ASIC & FPGA Design Engineer Sr

MISSILES AND FIRE CONTROL Until 9/23/2026 3+ years exp First posted May 29, 2026 Last posted July 25, 2026
Job description
• Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university; Master’s degree preferred

• Minimum 3 years of professional experience with FPGA design and simulation verification or a related discipline

• Proficiency in HDL programming with VHDL, Verilog, and/or SystemVerilog

• Experience with Xilinx/AMD toolsets (Vivado, Vitis, Vitis HLS) and UltraScale design methodology

• Experience with FPGA simulation tools such as Synopsys VCS

• Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity

• Experience with high-speed interfaces such as AXI, Ethernet, TCP/IP, PCIe, and serial protocols

• Practical laboratory debug experience with high-speed oscilloscopes, spectrum analyzers, and signal generators

• Familiarity with Synopsys EDA tools

• Must be a US Citizen; must possess or be able to obtain a DoD Secret clearance
About this role

Summary

Design and verify FPGA solutions for defense applications using HDL and simulation tools.

Job title

ASIC & FPGA Design Engineer Sr

Experience level

3+ years

Minimum experience

3+ years exp

Industry

aerospace defense

Location requirements

remote allowed, based in US or willing to relocate to US

Salary

Not specified

Management role

No

Skills & keywords

Required skills

FPGA designsimulation verificationVHDLVerilogSystemVerilogXilinxVivadoVitisVitis HLSUltraScaleSynopsys VCStiming analysisclock domain crossingsignal integrityAXIEthernetTCP/IPPCIeserial protocolsoscilloscopesspectrum analyzerssignal generatorsSynopsys EDA tools

Preferred skills

None specified

Specializations

FPGAHDLVHDLVerilogSystemVerilog
Locations

Structured locations inferred from the posting.

United States

Remote Country