2027 Intern - Analog Design Engineer

CZ61 NXP Semiconductors Czech Republic s.r.o.

Apply to this job
Suzhou Until 9/1/2026 H-1B sponsor history First posted July 3, 2026 Last posted July 3, 2026
Job description

Responsibilities

  • Responsible for analog / mixed-signal IP design for ARM-based MCU/MPU product development
  • IP schematic design / analog & mix-signal simulation/ layout design / IP view generation / technical documentation
  • Work with SoC / Backend team on IP integration.

Requirements

  • Master in micro-electronics, electronic engineering or relevant disciplines.
  • Basic knowledge in analog/mixed-signal IP design , verification and validation flow;
  • Familiar with design EDA tool: Cadence Virtuoso, Hspice/Spectre, Calibre, Matlab, QRC , etc.
  • Experience in LDO/ DCDC/ Data-Conversion / Clocking / OPAMP design is a plus
  • Good communication skills and teamwork for global projects support;


More information about NXP in Greater China...

#LI-d6f4
About this role

Summary

Assist in analog/mixed-signal IP design, verification, and documentation processes

Job title

2027 Intern - Analog Design Engineer

Experience level

intern level

Industry

semiconductors

Location requirements

Suzhou, no remote work allowed

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

microsystemsEDA toolsCadence VirtuosoHspiceSpectre

Preferred skills

LDODCDCData-ConversionClockingOPAMP

Specializations

analog designmixed-signalIP designverification
Locations

Structured locations inferred from the posting.

Suzhou, Jiangsu, China

On-site City