2027 Campus - Analog Design Engineer

CZ61 NXP Semiconductors Czech Republic s.r.o.

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Suzhou Until 9/1/2026 H-1B sponsor history First posted July 3, 2026 Last posted July 3, 2026
Job description

Responsibilities

• Responsible for analog / mixed-signal IP design for MCU product development

• Independent IP schematic design / analog & mix-signal simulation/ layout design / IP view generation / technical documentation

• Work with SoC / Backend team on IP integration.

• Work with test/validation/qualification team on IP validation, characterizations and failure analysis.

Requirements

• Master degree in micro-electronics, electronic engineering or relevant disciplines.

• Familiar with analog/mixed-signal IP design, simulation, integration and validation flow with industrial standard EDA tools and test equipment.

• Familiar with design EDA tool: Cadence Virtuoso, Hspice/Spectre, Calibre, Matlab, QRC , etc.

• Experience in LDO/ DCDC/ Data-Conversion / Clocking / OPAMP design is a plus

• Good communication skills and teamwork for global projects support;


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About this role

Summary

Design and validate analog/mixed-signal IP for MCU products.

Job title

Analog Design Engineer

Experience level

master degree

Industry

semiconductors

Location requirements

Suzhou; no remote work allowed

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

EDA toolsCadence VirtuosoHspiceSpectreCalibreMatlab

Preferred skills

LDODCDCData-ConversionClockingOPAMP

Specializations

analogmixed-signalIP designsimulationvalidation
Locations

Structured locations inferred from the posting.

Suzhou, Jiangsu, China

On-site City