2026 Campus - SoC Backend Design Engineer

CZ61 NXP Semiconductors Czech Republic s.r.o.

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Tianjin (Teda) Until 8/22/2026 H-1B sponsor history First posted July 15, 2025 Last posted July 15, 2025
Job description

Description:

  • The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design.
  • The individual is responsible from RTL synthesis to GDS implementation and optimization of design including floor planning, routing, timing convergence (STA) including related design ECO and physical verification for fulfilling all Technology & reliability related rules, such as DRC/LVS/Electromigration/IR drops.
  • The individual contributes to problem solving related to physical design. Contributes to define best Physical design strategy per technology node.

Requirements:

  • Master degree, major in microelectronics, electronic engineering , computer science or relevant disciplines.
  • Knowledge and experience in SoC design, with backend ones being a plus.
  • Script coding ability Perl/TCL/Python in Linux/Unix environment.
  • Excellent communication skills and collaboration spirit.


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About this role

Summary

Responsible for physical implementation of IP and IC design.

Job title

2026 Campus - SoC Backend Design Engineer

Experience level

entry level

Industry

semiconductors

Location requirements

Tianjin (Teda), remote work not allowed

Salary

Not specified

Visa sponsorship

H-1B sponsor history

Management role

No

Skills & keywords

Required skills

master degreemicroelectronicselectronic engineeringcomputer scienceSoC designPerlTCLPythonLinuxUnixcommunication

Preferred skills

None specified

Specializations

SoCbackendphysical designmicroelectronicsscripting
Locations

Structured locations inferred from the posting.

Unknown location

On-site